The fabrication of silicon based solar cells requires a number of specialized processes to occur in a specific order. Generally these processes include single crystalline silicon ingots grown in crystal growing furnaces or cast into multi-crystalline blocks in “directional solidification” furnaces. The result of these processes are long “sausage-shaped” single crystal masses called ingots, or multi-crystalline blocks, from which thin slices of silicon are cut transversely with “wire saws” to form rough solar cell wafers. These wafers, whether made up of a single crystal or multiple crystals conjoined together, are then processed to form smooth wafers in the 150 to 330 micrometer range of thickness. Because of the scarcity of suitable silicon, the current trend is towards making the wafers thinner, typically 140-180 micrometers thick.
Finished raw wafers are then processed into functioning solar cells, capable of generating electricity by the photovoltaic effect. Wafer processing starts with various cleaning and etching operations, followed by a 2-stage process called diffusion which creates a semi-conducting “p-n”, junction diode, followed by a third process in which “solder paste” coatings of various compositions are screen-printed on the wafer front and back sides and then fired into the p-n junction or back contact layer, where they act as ohmic collectors and grounds, respectively. Typically the back contact surface (ground) is formed from an Al-based paste, and the front surface collector grids are Ag-based paste compositions. Currently is the most common wafers used for forming solar cells are p-type silicon, as n-type is substantially more expensive, although the photovoltaic efficiency is somewhat greater.
The diffusion process broadly comprises two stages: a first stage of applying phosphorous to the top surface of the wafer, e.g., by spraying it with a dilute aqueous solution of phosphoric acid or by placing the wafers in a muffle and exposing them to a vapor of phosphorous oxichloride (POCl3) created by bubbling nitrogen, N2, through liquid POCL3. In the muffle process, the wafers are closely stacked in a carrier and placed in the muffle tube into which the POCL3 is introduced. In the aqueous phosphoric acid process, the doping step occurs in a process zone through which wafers are transported on a conveyor, wherein the surfaces are coated with a phosphoric acid dopant material. Optionally, the doper may include preconditioning one or both wafer surfaces with ozone as an oxidizer. Thereafter the wet acid is dried on the top surface of the wafers.
Boron may also be introduced into the silicon wafer surface, particularly the bottom (back side) surface by application of a boric acid solution followed by diffusion firing. The B-doped wafer surface assists in forming a good ground on the back surface without the need for a back contact Al-based solder layer, thus eliminating that step. Coating both the top surface with a P-dopant composition and the bottom surface with a B-dopant compositions followed by firing in a diffusion furnace is termed “P-B doping” and “Co-Diffusion Firing”, respectively.
The second stage of the doping process comprises heating (firing) the coated wafers at high temperatures in a diffusion furnace, chamber, or heating zone, to cause diffusion of the P-based dopant composition into the Si (or other advanced material) top surface of the wafer substrate to form the p-n junction layer, or/and diffusion of the B-based dopant composition into the bottom surface of the wafer surface to form a ground (back contact) layer. The P or/and B is driven into the wafer by the high temperature diffusion firing. Current diffusion firing processes move the wafers slowly through the furnace, the transit time being in the range of 20-30 minutes. The P-doped Si forms the “emitter” layer of the photovoltaic cell, that is, the layer that emits electrons upon exposure to sunlight (the normal photon source). After diffusion firing, the wafer resistivity is measured in an array of spaced points on the top surface, with the higher the resistance value, in Ohms, the better the photovoltaic response of the final solar cell.
The following is a summary of subsequent steps of processing diffusion-fired wafers and some significant problems of the present art, which puts the invention into more complete context.
After diffusion and various cleaning, laser edge ablation, and etching processes to remove unwanted semi-conductor junctions from the sides of the wafers, the wafers are coated with an Anti-Reflective Coating (ARC), typically silicon nitride (SiN3), generally by plasma-enhanced chemical vapor deposition (PECVD). Between some of these processes, the wafers are dried in preparation for subsequent processes in low temperature drying ovens.
The SiN3 ARC is deposited to a thickness of approximately ¼ the wavelength of light of 0.6 microns. After ARC application, the cells exhibit a deep blue surface color (or brown color, depending on the coating material used). The ARC minimizes the reflection of incident photons having wavelengths around 0.6 microns. The ARC SiNx coating is created in the PECVD process by mixing silane, SiH4, ammonia, NH3, and pure nitrogen, N2, gases in various concentrations in a high or low frequency microwave field. The hydrogen dissociates and diffuses very rapidly into the silicon wafer. The hydrogen has a serendipitous effect of repairing bulk defects, especially in multi-crystalline material. The defects are traps where electron-hole pairs can recombine thereby reducing cell efficiency or power output.
As noted above, where a back contact layer is used for ground, the back surface typically is fully covered by an Al-based paste. The front or top surface is screen printed with a fine network of Ag-based paste lines connected to larger buss conductors to “collect” the electrons generated, either within the depleted region of the underlying P-doped Si emitter, or near the surface. At the same time, the highest possible open area is left uncovered for the conversion of light into electricity.
After these pastes have been dried, they are “co-fired” at high temperature in an IR lamp-heated conveyor-type metallization furnace. The back surface Al-paste melts into a uniform back contact grounding layer, while the front surface paste lines are sintered to form smooth, low-ohmic resistance conductors (lines and busses) on the front surface of the solar cell. During this IR-heated metallization firing, elevated temperatures (above 850° C.) will cause the hydrogen to diffuse back out of the wafer. Thus, short firing times are necessary to prevent this hydrogen from ‘out-gassing’ from the wafer. It is best that the hydrogen is captured and retained within the bulk material (especially in the case of multi-crystalline material).
Currently available IR conveyor furnaces for such diffusion firing processes have a long heating chamber in which a plurality of IR lamps are substantially evenly spaced apart (on the order of 1.5″ apart) both above and below the wafer transport system (wire mesh belt or ceramic roller conveyor). The heating zone is insulated from the outside environment with various forms of insulation, compressed insulating fiber board being the most common. The infra-red (IR) lamps increase the temperature of the incoming silicon wafers to approximately 700° C. to 950° C. This temperature is held for the 30-minute duration of the diffusion process, after which the wafers are cooled and transferred to the next downstream process operation and equipment.
Currently available conveyor-type liquid dopers (as distinct from the muffle tube and carrier-type POCl3 gas dopers) employ paper or elastomeric band conveyors on which the wafers travel. In the case of paper transfer systems, wafers rest on a disposable paper conveyor belt to protect the back side of the wafer from exposure to the doping chemicals. This method requires time-consuming extra steps of mounting rolls of wafer carrier paper at the inlet end, and separation, collection and disposal of the used paper at the outlet end.
Currently available diffusion furnaces typically employ one of two types of wafer transport systems: 1) a plurality of static (not-longitudinally moving), solid ceramic, rotating rollers; or 2) active (longitudinally moving) metal wire mesh belts, to convey the wafers through the furnace firing zone. Static, ceramic rotating-roller furnaces currently are preferred in order to minimize or prevent metallic contamination of the back surface of the wafers as occurs with metal mesh belts, by metal or metal ions evaporating off the wire mesh during processing. Ceramic roller furnaces are not used in metallization firing.
A typical conventional diffusion furnace is on the order of 400″ long, having 160, 36″-wide IR lamps placed above the rollers, with from 100-160 placed below. The total mass of the conveyor rollers is on the order of 800 lbs, and is classified as a high-mass conveyor system.
In such high-mass, static, solid, rotating roller conveyor furnaces, the IR lamps take substantial time to bring the furnace chamber up to diffusion temperature in the range of 700° C. to 950° C. The theory of operation apparently is that the heated roller mass helps keep the furnace at a more even temperature throughout, as a result of the thermal reserve provided by a large, hot mass having a substantial heat capacity. Such furnace systems are touted as being able to compensate, in the short term, for failure of one or several IR lamps, if spread throughout the furnace, since the hot rollers continue to provide heat to the wafers via contact conduction and hot air convection. The IR lamps below the rollers maintain the rollers hot, and the contact of the wafers with the rollers helps transfer heat to the wafers by thermal contact conduction. Since the rollers at the entrance and exit are not heated by the same number of lamps as those in the center of the furnace, the furnace has a pronounced longitudinal thermal profile, rising at the entrance and descending at the exit.
As the demand for solar cells increases, the rates of production must increase, either by process improvements or adding furnaces into service. With respect to adding furnaces, conventional furnaces have a large footprint and the diffusion process is very slow. In large part, because of the mass of ceramic in the furnace that provides thermal energy, the IR lamps are run at from about 15-20% of maximum power. Running them at greater power levels would easily raise the temperature higher than needed for diffusion, and approach failure of metallic components (e.g., in the roller drive elements secured to the ends of the rollers). Accordingly, the “soak” period to accomplish diffusion is long—on the order of 20-30 minutes. Thus, since the furnaces are large, adding furnaces requires increased capital outlay, for buildings, the furnaces themselves, and related service facilities. The great mass of the conveyors requires high energy input. In addition, there is a long heat-up stage at start-up, and likewise a long cool-down stage in order to be able to service the furnace, which cannot be done when hot. Both result in process inefficiencies and waste of energy.
In the case of wire mesh belts used in the metallization furnaces, the mesh belts must be supported beneath the belts to prevent sagging. These supports are provided as pairs of opaque, white quartz tubes or rods, typically on the order of 2-3 cm in diameter, placed with their long axes parallel-to or slightly canted to the direction of travel of the belt, e.g. in a staggered converging or diverging (herringbone) pattern. The quartz tubes are smooth, and provide line contact surfaces on which the underside of the conveyor belt slides as it transports the printed wafers through the metallization furnace processing zones. However, the presence of the belt support tubes or rods significantly shadow the underside of the wafers, so that there is uneven distribution of IR radiant heating energy on the backside of the wafers. The back surface ground contact layer paste flow can be adversely affected, and a “shadow” of the support tubes is imprinted into the wafer, adversely affecting its performance. This was particularly adverse where the tubes were spaced apart along each side of the conveyor belt travel centerline and parallel to it. Accordingly, the practice for over 10 years has been to angle the tubes, either converging or diverging along the line of travel so that the same portion of the wafer was not shadowed the entire duration of travel through the furnace. The shadow effect is reduced by this trick of angling the support tubes, but not eliminated, because now the entire wafer is in shadow at least some of the duration of transport through the furnace. In effect, the shadow lines are there, less pronounced and more diffuse, but broader.
In addition to a shadowing effect, the presence of quartz tube or rod belt supports presents an energy inefficiency in two respects: First, the energy cost to heat the belt and supports, and second, the additional energy cost required to overcome shadowing by the belt (which is minor for the wire mesh belts themselves) and the quartz tube or rod supports (substantial). In addition, wide metal belts and quartz supports are expensive to fabricate (materials and manufacturing costs) and to maintain (repair and replacement). The belts and quartz tube or rod supports are expensive to ship and handle during installation.
In addition, the need to cool the mass of the wire mesh belt requires, in current commercially available metallization furnaces, a long cooling section having water cooled heat transfer units located under the belt between the peak zone and the output transfer belt. The conveyor cannot be returned to the cold, input end, as thermal shock of a wafer contacting a hot belt can damage wafers. These zones and the heat exchange tubing modules are on the order of 6-10′ in length, extend the footprint of the furnace, are expensive to manufacture, and require energy to pump the water. In addition, since most such systems have once-through cooling, a lot of water is wasted.
With respect to furnace interior access, provided for service and maintenance only when the furnace is OFF and cold, two main systems are currently commercially available. The oldest system, dating from around 2001 is a 4-poster Top-Lift, UP Access system used by RTC Corporation and TP Solar, Inc in their furnaces and dryers (Richert U.S. Pat. No. 6,501,051, Csehi U.S. Pat. No. 5,088,921, Ragay U.S. Pat. No. 7,805,064 and Parks U.S. Pat. No. 8,039,289). In such systems, the upper half portion of the heating zone is lifted by four corner jacks above the conveyor belt and fixed-position lower half of the furnace. This provides worker-standing-height access to the upper portion for service of the upper lamps while the belt remains completely supported by its support tubes. However, the belt and its supports block access to the lower half. In contrast, Despatch Industries uses a relatively new and very different system, commercially dating from 2006, in which the bottom half portion of the heating zone drops in a Bottom-Drop, DOWN Access system (Melgaard U.S. Pat. No. 7,514,650). The arrangement of the jacks is different and the result is different than in UP Access systems, in that when the bottom portion is dropped, the conveyor belt is suspended in mid-air blocking access to the fixed-position upper half, and access for kneeling workers to the lower half is possible after removal of the conveyor support rods. Where a considerable number of wafers are broken during processing in the Despatch furnaces, access to the bottom half of the furnace may be considered a benefit.
Thus, the need for faster production and greater throughput, while curbing facility capital outlay, is not met by the current state of the art solid, rotating ceramic roller conveyor furnaces or by quartz-tube/rod-supported metal-mesh belts. In order to compensate, conveyor-type furnaces have been made laterally wider, so that multiple lines of wafers can be processed in each process zone. This in turn requires longer, more expensive lamps which typically experience a substantially shorter mean time to failure, thus significantly increasing operating costs.
Since there are dimensional and IR lamp cost constraints, increasing lamp density in the furnace is not generally a feasible solution. Likewise, increasing the power to the lamps to boost output is not currently feasible because higher output can result in overheating of the lamp elements, as a result of the thermal mass of the furnace, principally in the high mass solid ceramic roller conveyor system. Overheating particularly affects the external quartz tubes of the lamps. Currently, commercially available metallization furnaces are thermocouple controlled. Since the IR lamps are placed side by side, on the order of 1.5″ apart, each lamp heats lamps adjacent to it. When the thermocouples detect temperatures approaching the selected diffusion or sintering temperature set point in the 700-950° C. range, they automatically cut back power to the lamps by an amount that depends on the thermal mass of the transport system (rollers or metal mesh belts and quartz tube supports). This lower power density is accompanied by substantial changes in the spectral output of the IR lamp emissions (hence a lower light flux and energy output). In turn, this reduced light flux results in the need to slow down the conveyor belt speed or lengthen the furnace (while maintaining the original belt speed), thus slowing processing. Overheating of lamps, e.g., due to thermocouple delay or failure, can cause the lamps to deform, sag and eventually fail. Lamp deformation also affects uniformity of IR output delivered to the wafers.
Finally, there is a severe problem in many countries with mains power fluctuation. Mains power is normally provided at 480 volts, and this is cut to the 225 volt level for supply to the furnace lamps by SCR voltage controllers. However, the Mains voltage typically fluctuates on the order of ±5-15% (25-75 volts), and is “noisy”. Where the fluctuation is that large, the voltage to the lamps can vary on the order of 20-35 volts. And the noise can cause the SCR to fire erratically. The result is significant errors in control of the furnace temperature, particularly as the thermocouples are relatively slow to respond. Since the transit time of wafers through the peak firing zone is on the order of 5-10 seconds, this fluctuation and noise-induced loss of control can result in a substantial number of wafers not being processed at the precise peak temperature needed to properly fuse the Ag-based paste into the n-p junction layer. The result is that in many wafers, the collector grid lines never penetrate the ARC layer into the junction layer, or burn all the way through it, shorting the wafer to ground.
Accordingly, there is a serious and substantial unmet need in the diffusion and metallization furnace and firing process art to significantly improve net effective use of firing zone(s) by reduction in conveyor mass (including supports), thereby providing better control and thermal profiles throughout the entire furnace, permitting improved utilization of firing energy, improving the speed and uniformity of the diffusion process, reducing furnace size by reducing or eliminating cooling zones, while retaining or improving throughput, and accomplishing these goals on a reduced furnace footprint, and lower energy, operating and maintenance costs.